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Serial-in / Parallel-out Driver Series
Serial / Parallel 2-input Drivers
BU2098F, BU2090F, BU2090FS
No.09051EAT04
Description Serial-in-parallel-out driver is a open drain output driver. It incorporates a built-in shift register and a latch circuit to turn on a maximum of 12 LED by a 2-line interface, linked to a microcontroller. A open drain output provides maximum of 25mA current.
Features 1) LED can be driven directly. (Output current 25mA) 2) 8/12 Bit parallel output 3) This product can be operated on low voltage. 2 4) Compatible with I C BUS. (BU2098)
Use For AV equipment such as, audio stereo sets, videos and TV sets, PCs, control microcontroller mounted equipment.
Line up Parameter Output current Output line Package
BU2098F 25 8 SOP16
BU2090F 25 12 SOP16
BU2090FS
Unit mA lines
SSOP-A16
Thermal derating curve
700 Pd [mW] Pd [mW] 600 500 400 300 200 100
85
700 600 500 400 300 200 100 0 BU2090FS
Power dissipation
BU2098F
Power dissipation
BU2090F
0
25
50
75
100
125
150
175
25
50
75
100
125
150
175
Ambient temperature Ta []
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1/12
2009.06 - Rev.A
BU2098F, BU2090F, BU2090FS
Electrical characteristics BU2098F (unless otherwise noted, VDD=5V, Vss=0V, Ta=25) Parameter Symbol Min. Typ. Input High-level voltage Input Low-level voltage Output Low-level voltage Input Low-level current Input High-level current Output leakage current Static dissipation current VIH VIL VOL IIL IIH IOZ IDD 0.7xVDD -
Technical Note
Max. 0.3xVDD 0.4 2.0 -2.0 5.0 2.0
Unit V V V A A A A
Condition
IOUT=10mA VIN=0 VIN=VDD Output=High impedance VOUT=VDD
BU2090F/BU2090FS (unless otherwise noted, VDD=5V/3V, VSS=0V, Ta=25) Parameter Symbol Min. Typ. Max. Input High-level voltage Input Low-level voltage Output Low-level voltage "H" output disable current "L" output disable current Static dissipation current
(*the value at 5V /3V)
Unit V V V A A
Condition
VIH VIL VOL IOZH IOZL IDD
3.5/2.5 -
*
-
1.5/0.4* 2.0/1.0 10 -5.0 5.0/3.0
* *
IOL=20mA VO=25V VO=0V
A
Operating conditions (Ta=25, VSS=0V) Parameter Power Supply Voltage Output Voltage Absolute maximum ratings BU2098F, BU2090F,BU2090FS Parameter Power supply voltage Power dissipation1 Power dissipation2 Operating temperature range Storage temperature range Output voltage Input voltage Symbol VDD Pd1 Pd2 Topr Tstg Vo VIN VSS to +18.0 -0.5 to VDD+0.5 Limits BU2098F -0.5 to +7.0 300 *
1
Symbol VDD Vo
Limits BU2098F +2.7 to 5.5 0 to +15 0 to +25 BU2090F/BU2090FS
Unit V V
BU2090F 300 500 *
1
BU2090FS -0.3 to +7.0V 500 650 *
2
Unit V
*3
*4
mW V V
-40 to +85 -55 to +125 VSS-0.3 to +25V VSS-0.3 to VDD+0.3V
Allowable loss of single unit * Reduced by 3mW/ over 25. (BU2098F) *1 Reduced by 3mW/ over 25. *2 Reduced by 5mW/ over 25. *3 Reduced by 5.0mW for each increase in Ta of 1 over 25.(When mounted on a board 70mmx70mmx1.6mm Glass-epoxy PCB) *4 Reduced by 6.5mW for each increase in Ta of 1 over 25.(When mounted on a board 70mmx70mmx1.6mm Glass-epoxy PCB)
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2/12
2009.06 - Rev.A
BU2098F, BU2090F, BU2090FS
Pin descriptions BU2098F PIN No. Pin Name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A0 A1 A2 Q0 Q1 Q2 Q3 VSS Q4 Q5 Q6 Q7 N.C. SCL SDA VDD I I/O Non connected Serial clock input Serial data input/output Power supply O Open drain output GND O Open drain output
Technical Note
I/O I I I
Function Address input, internally pull-up
BU2090F/BU2090FS PIN No. Pin Name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 VSS DATA CLOCK Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 VDD
I/O I I GND Serial data input
Function
Data shift clock input (rising edge trigger) The shift data is transferred to the output when the input data logic level is high during the falling transition of the clock pulse.
Parallel data output (Nch Open Drain FET) O Latch data Output FET L ON H OFF
-
Power supply
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3/12
2009.06 - Rev.A
BU2098F, BU2090F, BU2090FS
Block diagram BU2098F Power-On Reset
Technical Note
SDA SCL I2C BUS A0 A1 A2 Controller Shift Register 8bit
L a t c h
Write Buffer Q0Q7
BU2090F/BU2090FS
CLOCK Controller Shift Register DATA 12bit
L a t c h
Write Buffer Q0Q11
Interfaces BU2090F/BU2090FS DATA, CLOCK
VDD VDD
BU2090F/BU2090FS Q0Q11
BU2098F Q0Q7
OUT
OUT
IN
GND (VSS) GND (VSS)
GND (VSS)
GND (VSS)
BU2098F A0A2
VDD VDD VDD
BU2098F SDA
VDD
BU2098F SCL
VDD
IN
IN
IN
GND (VSS) GND (VSS)
GND (VSS)
GND (VSS)
GND (VSS)
GND (VSS)
GND (VSS)
GND (VSS)
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4/12
2009.06 - Rev.A
BU2098F, BU2090F, BU2090FS
BU2098F AC characteristics (Unless otherwise noted, VDD=5V, VSS=0V, Ta=25) 2 Fast mode I C BUS Parameter Symbol Min. Max. SCL clock frequency Bus free time between start-stop condition Hold time start condition Low period of the SCL clock High period of the SCL clock Set up time Re-start condition Data hold time Data set up time Rise time of SDA and SCL Fall time of SDA and SCL Set up time stop condition Capacitive load for SDA line and SCL line fSCL tBUS tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tR tF tSU:STO Cb 0 1.3 0.6 1.3 0.6 0.6 0 100 20+0.1Cb 20+0.1Cb 0.6 400 0.9 300 300 400
Technical Note
Standard mode I2C BUS Min. 0 4.7 4.0 4.7 4.0 4.7 0 250 4.0 Max. 100 1000 300 400
Unit kHz s s s s s s ns ns ns s pF
Timing chart
SDA tBUS tHD:STA
tLOW
tr
tf
SCL tHD:STA tSU:STO
P
S
tHD:DAT
tSU:DAT
tSU:STA
Sr
P
Fig.1 SDA, SCL timing chart
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5/12
2009.06 - Rev.A
BU2098F, BU2090F, BU2090FS
Function Start condition The start condition is a "HIGH" to "LOW" transition of the SDA line while SCL is "HIGH". Stop condition The stop condition is a "LOW" to "HIGH" transition of the SDA line while SCL is "HIGH".
Technical Note
SDA
SCL S
Start condition
P
Stop condition
Fig.2 Start / Stop condition
Acknowledge The master (p) puts a resistive "HIGH" level on the SDA line during the acknowledge clock pulse. The peripheral (audio processor) that acknowledge has to pull-down ("LOW") the SDA line during the acknowledge clock pulse, so that the SDA line is stable "LOW" during this clock pulse. The slave which has been addressed has to generate an acknowledgement after the reception of each byte, otherwise the SDA line remains at the "HIGH" level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer.
SCL
(from master)
clock for acknowledge
1
8
9
SDA
(from master)
not confirm SDA
(from slave)
S ACK signal
confirm
Fig.3 Acknowledge
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6/12
2009.06 - Rev.A
BU2098F, BU2090F, BU2090FS
Technical Note
Write DATA Send the stave address from master following the start condition (S). This address consists of 7 bits. The left 1 bit (the foot bit) is fixed "0". The stop condition (P) is needed to finish the data transferred. But the re-send starting condition (Sr) enables to transfer the data without STOP (P).
S slave address R/W ACK
"0" (Write)
DATA
ACK
P
S
slave address
R/W
ACK
"0" (Write)
DATA
ACK
Sr
slave address
R/W
ACK
"0" (Write)
DATA
ACK
P
Fig.4 DATA transmit
Data format The format is following.
S A6 A5 A4 A3 A2 A1 A0 R/W ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK P
SLAVE ADDRESS
WRITE DATA
Table 1 for WRITE format Slave address A0A2 A3A6 R/W Write Data D0D7 Each bit can be defined by the input levels of pins A0A3. These 4 bits are fixed. "0" Write "1" to D0 makes Q0 pin High-impedance. And write "0" makes Q0 pin LOW. D[1:7] and Q[1:7] are same as D0 and Q0.
Table 2 for (A2, A1, A0) to SLAVE ADDRESS A6 0 0 0 0 0 0 0 0 A5 1 1 1 1 1 1 1 1 A4 1 1 1 1 1 1 1 1 A3 1 1 1 1 1 1 1 1 A2 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 A0 0 1 0 1 0 1 0 1 Slave address 38H 39H 3AH 3BH 3CH 3DH 3EH 3FH
Fixed for BU2098F
Defined by external pin A0A2
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7/12
2009.06 - Rev.A
BU2098F, BU2090F, BU2090FS
Data transmission timing
Technical Note
SDA
S
A6
A5
A4
A3
A2
A1
A0
R/W ACK
D7
D6
D5
D4
D3
D2
D1
D0
ACK
P
Slave address
Write data
Latch pulse
Output (Q7Q0)
Output the write data to Q7Q0 at the same time.
Fig.5 Timing chart for WRITE
Command sample for driving LEDs. These are all off. (terminal A0A2 is open)
Power Supply ON
LEDs all-ON with power supply ON
SDA
S
0
1
1
1
1
1
1
0
ACK
1
1
1
1
1
1
1
1
ACK
P
Slave address
Write data LEDs are all-off by this command.
RESET CONDITION After reset, Q0Q7 pins are ON. (LEDs are all ON.)
RISING TIME OF POWER SUPPLY VDD must rise within 10ms. If the rise time would exceed 10ms, it is afraid not to reset the BU2098F.
VDD
GND
t10ms
Fig.6 Rising time of power supply
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8/12
2009.06 - Rev.A
BU2098F, BU2090F, BU2090FS
BU2090F/BU2090FS AC characteristics (unless otherwise noted, VDD=5V, VSS=0V, Ta=25) Limit Parameter Symbol Min. Typ. Minimum clock frequency Data shift set up time Data shift hold time Data latch set up time Data latch hold time Data latch "L" set up time Data latch "L" hold time tw tSU tH tLSUH tLHH tLSUL tLHL 500 1000 200 300 200 400 50 100 250 500 200 400 250 500 -
Technical Note
Max. -
Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Condition VDD=5V VDD=3V VDD=5V VDD=3V VDD=5V VDD=3V VDD=5V VDD=3V VDD=5V VDD=3V VDD=5V VDD=3V VDD=5V VDD=3V
Switching time test circuit
VDD Q0
Pulse Gen.
25V RL 10k
CLOCK
25V
Pulse Gen.
DATA Q11
RL 10k
GND (Vss)
Fig.7 Switching time test waveforms
tW
90% 90%
tW
90%
VDD
CLOCK
10%
10%
10%
10%
GND (Vss)
tSU
tH
tLSUL
tLHL
tLSUH
tLHH
90%
90%
VDD
90% 90%
DATA
10%
10%
GND (Vss)
Fig.8
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9/12
2009.06 - Rev.A
BU2098F, BU2090F, BU2090FS
Timing chart BU2098F Slave address Device code SCL
1 2 3 4
Technical Note
External terminal
5 6 7 8 9 1 2 3 4 5 6 7 8 9
Start condition SDA VCC Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
A6 A5 A4 A3 A2 A1 A0 RW ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK
Stop condition
Note) Diagram shows a status where a pull-up resistor is connected to output. BU2090F/BU2090FS
CLOCK
DATA Q11 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Note1) Indicates undefined output. Note2) Output terminal is provided with a pull-up resistor.
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
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10/12
2009.06 - Rev.A
BU2098F, BU2090F, BU2090FS
Technical Note
Notes for use 1. Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. 2. Connecting the power supply connector backward Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An external direction diode can be added. 3. Power supply lines Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line, separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the circuit, not that capacitance characteristic values are reduced at low temperatures. 4. GND voltage The potential of GND pin must be minimum potential in all operating conditions. 5. Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 6. Inter-pin shorts and mounting errors Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if pins are shorted together. 7. Actions in strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. 8. Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when transporting or storing the IC. 9. Ground Wiring Pattern When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either. 10. Unused input terminals Connect all unused input terminals to VDD or VSS in order to prevent excessive current or oscillation. Insertion of a resistor (100k approx.) is also recommended.
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11/12
2009.06 - Rev.A
BU2098F, BU2090F, BU2090FS
Ordering part number
Technical Note
B
U
2
Part No. 2098 2090
0
9
0
F
S
-
E
2
Part No.
Package F : SOP16 FS : SSOP-A16
Packaging and forming specification E2: Embossed tape and reel
SOP16

10 0.2 (MAX 10.35 include BURR) 16 9
Tape Quantity Direction of feed
0.3MIN
Embossed carrier tape 2500pcs E2
The direction is the 1pin of product is at the upper left when you hold
6.20.3
4.40.2
( reel on the left hand and you pull out the tape on the right hand
)
1
8 0.15 0.1
1.50.1 0.11
1.27
0.4 0.1
0.1
1pin
(Unit : mm)
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
SSOP-A16
6.6 0.2 (MAX 6.95 include BURR)
16 15 14 13 12 11 10 9

Tape Quantity Embossed carrier tape 2500pcs E2
The direction is the 1pin of product is at the upper left when you hold
6.20.3
4.40.2
Direction of feed
0.3MIN
( reel on the left hand and you pull out the tape on the right hand
)
1
2
3
4
5
6
7
8
1.50.1
0.15 0.1
0.11
0.8
0.1
0.36 0.1
1pin
(Unit : mm)
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
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12/12
2009.06 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
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